Format |
Syntax: |
Operation: |
Operands: |
Architecture revision |
Opcode | ||||||||||||||
|
1 |
stcm.d CP#, {--}Rp, ReglistCPD8 |
Storeaddress =Rp;
if Opcode[--] == 1 then
for (i = 0 to 7)
if ReglistCPD8[i] == 1 then
*(--Storeaddress) =CP#(CR(2*i));
*(--Storeaddress) =CP#(CR(2*i+1));
Rp = Storeaddress;
else
for (i = 7 to 0)
if ReglistCPD8[i] == 1 then
*(Storeaddress++) =CP#(CR(2*i+1));
*(Storeaddress++) =CP#(CR(2*i)); |
p ∈ {0, 1, …, 15}
ReglistCPD8 ∈ {CR0-CR1,CR2-CR3,CR4-CR5,CR6-CR7,CR8-CR9,
CR10-CR11,CR12-CR13,CR14-CR15} |
Rev1+ |
| ||||||||||||||
|
2 |
stcm.w CP#, {--}Rp, ReglistCPH8 |
Storeaddress =Rp;
if Opcode[--] == 1 then
for (i = 0 to 7)
if ReglistCPH8[i] == 1 then
*(--Storeaddress) =CP#(CRi+8);
Rp = Storeaddress;
else
for (i = 7 to 0)
if ReglistCPH8[i] == 1 then
*(Storeaddress++) =CP#(CRi+8); |
ReglistCPH8 ∈ {CR8, CR9, CR10, ..., CR15} |
Rev1+ |
| ||||||||||||||
|
3 |
stcm.w CP#, {--}Rp, ReglistCPL8 |
Storeaddress =Rp;
if Opcode[--] == 1 then
for (i = 0 to 7)
if ReglistCPL8[i] == 1 then
*(--Storeaddress) =CP#(CRi);
Rp = Storeaddress;
else
for (i = 7 to 0)
if ReglistCPL8[i] == 1 then
*(Storeaddress++) =CP#(CRi); |
ReglistCPL8 ∈ {CR0, CR1, CR2, ..., CR7} |
Rev1+ |
|
Writes multiple registers in the addressed coprocessor into the specified memory locations.
|
Q: |
Not affected. |
|
V: |
Not affected. |
|
N: |
Not affected. |
|
Z: |
Not affected. |
|
C: |
Not affected. |
stcm.w CP2, --SP, CR2-CR5
Emtpy ReglistCPH8/ReglistCPL8/ReglistCPD8 gives UNDEFINED result.